product brief CHL8225/chl8228 digital multi-phase buck controller trademarks and registered trademarks are the property of th e respective owners. pb 0008, rev 1.0, june 11, 2010 - 1 - one highwood drive, tewksbury, ma 01876 tel: +1(978) 640 - 0011 www.chilsemi.com ? 20 10 chil semiconductor corp. all rights reserved features ? 5-phase & 8-phase dual output pwm controller with phases flexibly assigned between loops 1 & 2 ? dynamic voltage control by 2-bit parallel interface with gamer mode override and vmax setting ? input voltage management for up to 3 input voltages ? i critical monitor and phase current capture mode ? phase switching frequency from 200khz to 1 .2 mhz ? chil efficiency shaping features including variable gate drive , dynamic phase control ? programmable 1-phase or 2-phase for light loads and active diode emulation for very light loads ? chil adaptive transient algorithm (ata) minimizes output bulk capacitors and system cost ? designed for use with coupled inductors ? per-loop fault protection : ovp, uvp, ocp, otp ? i2c/smbus/pmbus system interface for telemetry of temperature , voltage , current & power for both loops ? n on -volatile memory (nvm) for custom configuration ? compatible with chil atl and 3.3v tri-state drivers ? +3.3v supply voltage; 0oc to 85oc ambient operation ? pb -free, rohs, 6x6 40pin & 8x8 56pin qfn packages description the CHL8225/8 are dual-loop digital multi-phase buck controllers. the CHL8225 drives up to 5 phases and the chl8228 drives up to 8 phases. they feature input voltage management allowing up to 3 input voltages to be monitored to ensure adequate power is delivered to the load . dynamic voltage control is provided by 4 registers which are programmed through i2c/smbus/pmbus and then selected using a 2-bit parallel bus for fast access. the CHL8225 /8 nvm saves pins and enables a small package size. the CHL8225 /8 includes the chil efficiency shaping technology to deliver exceptional efficiency at minimum cost across the entire load range. chil variable gate drive optimizes the mosfet gate drive voltage as a function of real-time load current. chil dynamic phase control adds and drops phases based upon load current. the CHL8225 /8 can be configured to enter 1-phase operation and active diode emulation mode based upon load current or b y command. chil s unique adaptive transient algorithm (ata), based on proprietary non-linear digital pwm algorithms, minimizes output bulk capacitors. in addition, a coupled inductor mode, with phases added/dropped in pairs enables further improvement in transient response and form factor. the i2c/pmbus interface can communicate with up to 16 CHL8225 /8 based vr loops. device configuration and fault parameters are easily defined using the chil intuitive power designer (ipd) gui and stored in on-chip nvm. the CHL8225 /8 provides extensive ovp, uvp, ocp and otp fault protection and includes thermistor based temperature sensing with vrhot signal. the CHL8225 /8 includes numerous features like register diagnostics for fast design cycles and platform differentiation, simplifying vrd design and enabling fastest time- to -market with its set -and- forget methodology. smb_dio pwm5 vrhot_icrit# vrtn rcsm isen5 isen4 isen3 vsen smb_clk pwm4 vr_ready irtn3 irtn4 irtn5 rcsp tsen vidsel0 pwm3 enable v18a rres vcc isen2 isen1 irtn1 irtn2 pwm2 pwm1 rcsm_l2 rcsp_l2 var_gate vidsel1 vidsel_l2 vinsen_aux1 vr_ready_l2 vcc vinsen vrtn_l2 vsen_l2 1 2 7 8 5 6 3 4 10 9 30 29 24 23 26 25 28 27 21 22 41 gnd CHL8225 40 pin 6x6 qfn top view 12 16 14 19 13 17 15 20 18 11 39 35 37 32 38 34 36 31 33 40 smb_dio pwm5 isen6 enable vrtn rcsm isen5 isen4 isen3 pwm6 vsen smb_clk pwm4 vr_ready irtn3 irtn4 irtn6 irtn5 rcsp tsen vrhot_icrit# pwm3 vinsen vidsel1_l2 v18a rres vcc isen2 isen1 irtn1 irtn2 pwm2 pwm1 vinsen_aux1 rcsm_l2 rcsp_l2 vboot vrhot2 vmax vidsel0 vidsel1 vidsel0_l2 vr_ready_l2 vcc vinsen_aux2 pwm7 vrtn_l2 vsen_l2 57 gnd chl8228 56 pin 8x8 qfn top view 55 51 53 48 54 50 52 47 49 56 46 45 43 44 1 2 7 8 5 6 3 4 10 9 12 11 14 13 16 20 18 23 17 21 19 24 22 15 25 26 28 27 42 41 36 35 38 37 40 39 33 34 31 32 29 30 isen8 en_l2 tsen2 var_gate pwm8 isen7 irtn7 irtn8 figure 1: CHL8225 & chl8228 packages applications ? multiphase gpu systems downloaded from: http:///
CHL8225/chl8228 digital multi-phase buck controller pb 0008 - 2 - rev 1.0, june 11, 2010 typical applications block diagram +3.3v v_gpu_l1 CHL8225/8 vinsen pwm4 pwm8 1 pwm3 pwm 2 pwm1 isen8 1 vr_rdy_l1 vsen vcc rres v18a vrtn irtn3 isen4 irtn1 rcsp irtn2 rcsm isen3 isen2 isen1 irtn4 +12v main from system l o a d rcs ccs r series r series r th r vin_1 r vin_2 irtn8 1 vr_rdy_l2 tsen r th2 gnd hvcc logate higate vccgnd pwm lvcc 12v v boot switch v v_vgd chl8510 hvcc logate higate vcc gnd pwm lvcc 12v v boot switch chl8510 v_vgd var_gate optional variable gate drive circuit v_gpu_l2 l o a d vr_hot_icrit# smb_clk smb_dio i2c or smbus v v vinsen_aux_2 1 rcsp_l2 rcsm_l2 rcs ccs r series r series r th vsen_l2 vrtn_l2 vidsel0 vidsel1 v v vinsen_aux_1 gpu i/o +12v aux 1 r vin_1 r vin_2 +12v aux 2 r vin_1 r vin_2 pwm5 isen5 irtn5 pwm6 1 isen6 1 irtn6 1 pwm7 1 isen7 1 irtn7 1 vidsel0_l2 1 v en_l2 1 v en v notes 1 chl8228 only vmax 1 vboot 1 mode hvcc logate higate vcc gnd pwm lvcc 12v v boot switch v v_vgd chl8510 mode hvcc logate higate vccgnd pwm lvcc 12v v boot switch v v_vgd chl8510 mode hvcc logate higate vcc gnd pwm lvcc 12v v boot switch v v_vgd chl8510 mode hvcc logate higate vccgnd pwm lvcc 12v v boot switch v v_vgd chl8510 mode mode unused phases vr_hot2 vidsel1_l2 1 v tsen2 r th2 ordering information chl822 ? - ? ? ? ? ? package tape & reel qty part number qfn 3000 CHL8225- 00 cr t 1 qfn 3000 CHL8225- xx cr t 2 qfn 3000 chl8228- 00 cr t 1 qfn 3000 chl8228- xx cr t 2 notes 1 for unprogrammed/default parts, use configuration file 00. unprogrammed parts will not start up until programmed in order to insure a safe power up. 2 -xx indicates a customer specific configuration file. t: tape & reel xx: configuration file operating temperature c: commercial package type r : qfn part 5: CHL8225 8 : chl8228 downloaded from: http:///
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